1893 lines
33 KiB
Devicetree
1893 lines
33 KiB
Devicetree
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
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&soc {
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tlmm: pinctrl@400000 {
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compatible = "qcom,trinket-pinctrl";
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reg = <0x400000 0xc00000>;
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reg-names = "pinctrl";
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interrupts-extended = <&wakegic GIC_SPI 227 IRQ_TYPE_NONE>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&wakegpio>;
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#interrupt-cells = <2>;
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/* QUPv3_0 SE mappings */
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/* SE 0 pin mappings */
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qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
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qupv3_se0_i2c_active: qupv3_se0_i2c_active {
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mux {
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pins = "gpio0", "gpio1";
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function = "qup00";
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};
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config {
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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};
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config {
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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/* SE 1 pin mappings */
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qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
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qupv3_se1_i2c_active: qupv3_se1_i2c_active {
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mux {
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pins = "gpio4", "gpio5";
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function = "qup01";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
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mux {
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pins = "gpio4", "gpio5";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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nfc {
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nfc_int_active: nfc_int_active {
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/* active state */
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mux {
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/* GPIO 85 NFC Read Interrupt */
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pins = "gpio85";
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function = "gpio";
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};
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config {
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pins = "gpio85";
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drive-strength = <2>; /* 2 MA */
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bias-pull-up;
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};
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};
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nfc_int_suspend: nfc_int_suspend {
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/* sleep state */
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mux {
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/* GPIO 85 NFC Read Interrupt */
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pins = "gpio85";
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function = "gpio";
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};
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config {
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pins = "gpio85";
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drive-strength = <2>; /* 2 MA */
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bias-pull-up;
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};
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};
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nfc_enable_active: nfc_enable_active {
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/* active state */
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mux {
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/* 83: Enable 84: Firmware */
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pins = "gpio83", "gpio84";
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function = "gpio";
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};
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config {
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pins = "gpio83", "gpio84";
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drive-strength = <2>; /* 2 MA */
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bias-pull-up;
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};
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};
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nfc_enable_suspend: nfc_enable_suspend {
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/* sleep state */
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mux {
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/* 83: Enable 84: Firmware */
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pins = "gpio83", "gpio84";
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function = "gpio";
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};
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config {
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pins = "gpio83", "gpio84";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_clk_req_active: nfc_clk_req_active {
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/* active state */
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mux {
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/* GPIO 95: NFC CLOCK REQUEST */
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pins = "gpio95";
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function = "gpio";
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};
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config {
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pins = "gpio95";
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drive-strength = <2>; /* 2 MA */
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bias-pull-up;
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};
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};
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nfc_clk_req_suspend: nfc_clk_req_suspend {
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/* sleep state */
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mux {
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/* GPIO 95: NFC CLOCK REQUEST */
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pins = "gpio95";
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function = "gpio";
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};
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config {
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pins = "gpio95";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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};
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/* SE 2 pin mappings */
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qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
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qupv3_se2_i2c_active: qupv3_se2_i2c_active {
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mux {
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pins = "gpio6", "gpio7";
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function = "qup02";
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};
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config {
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
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mux {
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pins = "gpio6", "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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/* SE 3 pin mappings */
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qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
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qupv3_se3_i2c_active: qupv3_se3_i2c_active {
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mux {
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pins = "gpio14", "gpio15";
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function = "qup03";
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};
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config {
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pins = "gpio14", "gpio15";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
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mux {
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pins = "gpio14", "gpio15";
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function = "gpio";
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};
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config {
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pins = "gpio14", "gpio15";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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/* SE 4 pin mappings */
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qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
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qupv3_se4_i2c_active: qupv3_se4_i2c_active {
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mux {
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pins = "gpio16", "gpio17";
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function = "qup04";
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};
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config {
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pins = "gpio16", "gpio17";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
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mux {
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pins = "gpio16", "gpio17";
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function = "gpio";
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};
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config {
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pins = "gpio16", "gpio17";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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/*QUPv3_1 SE mappings */
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/* SE 5 pin mappings */
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qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
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qupv3_se5_i2c_active: qupv3_se5_i2c_active {
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mux {
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pins = "gpio22", "gpio23";
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function = "qup10";
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};
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config {
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pins = "gpio22", "gpio23";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
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mux {
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pins = "gpio22", "gpio23";
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function = "gpio";
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};
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config {
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pins = "gpio22", "gpio23";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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/* SE 6 pin mappings */
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qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
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qupv3_se6_i2c_active: qupv3_se6_i2c_active {
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mux {
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pins = "gpio30", "gpio31";
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function = "qup11";
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};
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config {
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pins = "gpio30", "gpio31";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
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mux {
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pins = "gpio30", "gpio31";
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function = "gpio";
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};
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config {
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pins = "gpio30", "gpio31";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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/* SE 7 pin mappings */
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qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
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qupv3_se7_i2c_active: qupv3_se7_i2c_active {
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mux {
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pins = "gpio28", "gpio29";
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function = "qup12";
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};
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config {
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pins = "gpio28", "gpio29";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
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mux {
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pins = "gpio28", "gpio29";
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function = "gpio";
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};
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config {
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pins = "gpio28", "gpio29";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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/* SE 8 pin mappings */
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qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
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qupv3_se8_i2c_active: qupv3_se8_i2c_active {
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mux {
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pins = "gpio18", "gpio19";
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function = "qup13";
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};
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config {
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pins = "gpio18", "gpio19";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
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mux {
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pins = "gpio18", "gpio19";
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function = "gpio";
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};
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config {
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pins = "gpio18", "gpio19";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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/* SE 9 pin mappings */
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qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
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qupv3_se9_i2c_active: qupv3_se9_i2c_active {
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mux {
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pins = "gpio10", "gpio11";
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function = "qup14";
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};
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config {
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pins = "gpio10", "gpio11";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
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mux {
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pins = "gpio10", "gpio11";
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function = "gpio";
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};
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config {
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pins = "gpio10", "gpio11";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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qupv3_se3_4uart_pins: qupv3_se3_4uart_pins {
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qupv3_se3_rx: qupv3_se3_rx {
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mux {
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pins = "gpio15";
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function = "qup03";
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};
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config {
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pins = "gpio15";
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drive-strength = <2>;
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bias-no-pull;
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};
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};
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qupv3_se3_tx: qupv3_se6_tx {
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mux {
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pins = "gpio14";
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function = "qup03";
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};
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config {
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pins = "gpio14";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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qupv3_se4_2uart_pins: qupv3_se4_2uart_pins {
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qupv3_se4_2uart_active: qupv3_se4_2uart_active {
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mux {
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pins = "gpio16", "gpio17";
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function = "qup04";
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};
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config {
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pins = "gpio16", "gpio17";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se4_2uart_sleep: qupv3_se4_2uart_sleep {
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mux {
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pins = "gpio16", "gpio17";
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function = "gpio";
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};
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config {
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pins = "gpio16", "gpio17";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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qupv3_se6_4uart_pins: qupv3_se6_4uart_pins {
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qupv3_se6_ctsrx: qupv3_se6_ctsrx {
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mux {
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pins = "gpio30", "gpio33";
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function = "qup11";
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};
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config {
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pins = "gpio30", "gpio33";
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drive-strength = <2>;
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bias-no-pull;
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};
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};
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qupv3_se6_rts: qupv3_se6_rts {
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mux {
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pins = "gpio31";
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function = "qup11";
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};
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config {
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pins = "gpio31";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se6_tx: qupv3_se6_tx {
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mux {
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pins = "gpio32";
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function = "qup11";
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};
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config {
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pins = "gpio32";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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qupv3_se9_4uart_pins: qupv3_se9_4uart_pins {
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qupv3_se9_ctsrx: qupv3_se9_ctsrx {
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mux {
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pins = "gpio10", "gpio13";
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function = "qup14";
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};
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config {
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pins = "gpio10", "gpio13";
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drive-strength = <2>;
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bias-no-pull;
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};
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};
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qupv3_se9_rts: qupv3_se9_rts {
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mux {
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pins = "gpio11";
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function = "qup14";
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};
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config {
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pins = "gpio11";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se9_tx: qupv3_se9_tx {
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mux {
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pins = "gpio12";
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function = "qup14";
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};
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config {
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pins = "gpio12";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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/* SPI Instances */
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/* SE 0 pin mappings */
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qupv3_se0_spi_pins: qupv3_se0_spi_pins {
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qupv3_se0_spi_active: qupv3_se0_spi_active {
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mux {
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pins = "gpio0", "gpio1", "gpio2",
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"gpio3";
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function = "qup00";
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};
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config {
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pins = "gpio0", "gpio1", "gpio2",
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"gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
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mux {
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pins = "gpio0", "gpio1", "gpio2",
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"gpio3";
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function = "gpio";
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};
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configs {
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pins = "gpio0", "gpio1", "gpio2",
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"gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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/* SE 2 pin mappings */
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qupv3_se2_spi_pins: qupv3_se2_spi_pins {
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qupv3_se2_spi_active: qupv3_se2_spi_active {
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mux {
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pins = "gpio6", "gpio7", "gpio8",
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"gpio9";
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function = "qup02";
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};
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config {
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pins = "gpio6", "gpio7", "gpio8",
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"gpio9";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
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mux {
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pins = "gpio6", "gpio7", "gpio8",
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"gpio9";
|
|
function = "gpio";
|
|
};
|
|
|
|
configs {
|
|
pins = "gpio6", "gpio7", "gpio8",
|
|
"gpio9";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* SE 5 pin mappings */
|
|
qupv3_se5_spi_pins: qupv3_se5_spi_pins {
|
|
qupv3_se5_spi_active: qupv3_se5_spi_active {
|
|
mux {
|
|
pins = "gpio22", "gpio23", "gpio24",
|
|
"gpio25";
|
|
function = "qup10";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22", "gpio23", "gpio24",
|
|
"gpio25";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
|
|
mux {
|
|
pins = "gpio22", "gpio23", "gpio24",
|
|
"gpio25";
|
|
function = "gpio";
|
|
};
|
|
|
|
configs {
|
|
pins = "gpio22", "gpio23", "gpio24",
|
|
"gpio25";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* SE 6 pin mappings */
|
|
qupv3_se6_spi_pins: qupv3_se6_spi_pins {
|
|
qupv3_se6_spi_active: qupv3_se6_spi_active {
|
|
mux {
|
|
pins = "gpio30", "gpio31", "gpio32",
|
|
"gpio33";
|
|
function = "qup11";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30", "gpio31", "gpio32",
|
|
"gpio33";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
|
|
mux {
|
|
pins = "gpio30", "gpio31", "gpio32",
|
|
"gpio33";
|
|
function = "gpio";
|
|
};
|
|
|
|
configs {
|
|
pins = "gpio30", "gpio31", "gpio32",
|
|
"gpio33";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* SE 8 pin mappings */
|
|
qupv3_se8_spi_pins: qupv3_se8_spi_pins {
|
|
qupv3_se8_spi_active: qupv3_se8_spi_active {
|
|
mux {
|
|
pins = "gpio18", "gpio19", "gpio20",
|
|
"gpio21";
|
|
function = "qup13";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18", "gpio19", "gpio20",
|
|
"gpio21";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
|
|
mux {
|
|
pins = "gpio18", "gpio19", "gpio20",
|
|
"gpio21";
|
|
function = "gpio";
|
|
};
|
|
|
|
configs {
|
|
pins = "gpio18", "gpio19", "gpio20",
|
|
"gpio21";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* SE 9 pin mappings */
|
|
qupv3_se9_spi_pins: qupv3_se9_spi_pins {
|
|
qupv3_se9_spi_active: qupv3_se9_spi_active {
|
|
mux {
|
|
pins = "gpio10", "gpio11", "gpio12",
|
|
"gpio13";
|
|
function = "qup_14";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10", "gpio11", "gpio12",
|
|
"gpio13";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
|
|
mux {
|
|
pins = "gpio10", "gpio11", "gpio12",
|
|
"gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
configs {
|
|
pins = "gpio10", "gpio11", "gpio12",
|
|
"gpio13";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
fsa_usbc_ana_en_n@124 {
|
|
fsa_usbc_ana_en: fsa_usbc_ana_en {
|
|
mux {
|
|
pins = "gpio124";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio124";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
wsa_swr_clk_pin {
|
|
wsa_swr_clk_sleep: wsa_swr_clk_sleep {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "WSA_CLK";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <2>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
wsa_swr_clk_active: wsa_swr_clk_active {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "WSA_CLK";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <2>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
};
|
|
|
|
wsa_swr_data_pin {
|
|
wsa_swr_data_sleep: wsa_swr_data_sleep {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "WSA_DATA";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <4>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
wsa_swr_data_active: wsa_swr_data_active {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "WSA_DATA";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <4>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* WSA speaker reset pins */
|
|
spkr_1_sd_n {
|
|
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_1_sd_n_active: spkr_1_sd_n_active {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
wcd9xxx_intr {
|
|
wcd_intr_default: wcd_intr_default{
|
|
mux {
|
|
pins = "gpio110";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio110";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* pull down */
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
|
|
tasha_cdc_reset_active: lpi_cdc_reset_active {
|
|
mux {
|
|
pins = "gpio120";
|
|
function = "gpio";
|
|
};
|
|
config {
|
|
pins = "gpio120";
|
|
drive-strength = <16>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
tasha_cdc_reset_sleep: lpi_cdc_reset_sleep {
|
|
mux {
|
|
pins = "gpio120";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio120";
|
|
drive-strength = <16>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
/* Tasha WSA speaker reset pins */
|
|
tasha_spkr_1_sd_n {
|
|
tasha_spkr_1_sd_n_sleep: tasha_spkr_1_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tasha_spkr_1_sd_n_active: tasha_spkr_1_sd_n_active {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
tasha_spkr_2_sd_n {
|
|
tasha_spkr_2_sd_n_sleep: tasha_spkr_2_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tasha_spkr_2_sd_n_active: tasha_spkr_2_sd_n_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
audio_ref_clk_active: audio_ref_clk_active {
|
|
mux {
|
|
pins = "gpio112";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio112";
|
|
drive-strength = <8>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
audio_ref_clk_sleep: audio_ref_clk_sleep {
|
|
mux {
|
|
pins = "gpio112";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio112";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
wcd937x_reset_active: wcd937x_reset_active {
|
|
mux {
|
|
pins = "gpio120";
|
|
function = "gpio";
|
|
};
|
|
config {
|
|
pins = "gpio120";
|
|
drive-strength = <16>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
wcd937x_reset_sleep: wcd937x_reset_sleep {
|
|
mux {
|
|
pins = "gpio120";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio120";
|
|
drive-strength = <16>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cdc_dmic01_clk_active: dmic01_clk_active {
|
|
mux {
|
|
pins = "gpio125";
|
|
function = "DMIC0_CLK";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio125";
|
|
drive-strength = <8>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
cdc_dmic01_clk_sleep: dmic01_clk_sleep {
|
|
mux {
|
|
pins = "gpio125";
|
|
function = "DMIC0_CLK";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio125";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cdc_dmic01_data_active: dmic01_data_active {
|
|
mux {
|
|
pins = "gpio126";
|
|
function = "DMIC0_DATA";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio126";
|
|
drive-strength = <8>;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
cdc_dmic01_data_sleep: dmic01_data_sleep {
|
|
mux {
|
|
pins = "gpio126";
|
|
function = "DMIC0_DATA";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio126";
|
|
drive-strength = <2>;
|
|
pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
cdc_dmic23_clk_active: dmic23_clk_active {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "DMIC1_CLK";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <8>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
cdc_dmic23_clk_sleep: dmic23_clk_sleep {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "DMIC1_CLK";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cdc_dmic23_data_active: dmic23_data_active {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "DMIC1_DATA";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <8>;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
cdc_dmic23_data_sleep: dmic23_data_sleep {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "DMIC1_DATA";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <2>;
|
|
pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tx_swr_clk_sleep: tx_swr_clk_sleep {
|
|
mux {
|
|
pins = "gpio106";
|
|
function = "swr_tx";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio106";
|
|
drive-strength = <2>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
tx_swr_clk_active: tx_swr_clk_active {
|
|
mux {
|
|
pins = "gpio106";
|
|
function = "swr_tx";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio106";
|
|
drive-strength = <10>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
tx_swr_data1_sleep: tx_swr_data1_sleep {
|
|
mux {
|
|
pins = "gpio107";
|
|
function = "swr_tx";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107";
|
|
drive-strength = <2>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
tx_swr_data1_active: tx_swr_data1_active {
|
|
mux {
|
|
pins = "gpio107";
|
|
function = "swr_tx";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107";
|
|
drive-strength = <10>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
tx_swr_data2_sleep: tx_swr_data2_sleep {
|
|
mux {
|
|
pins = "gpio108";
|
|
function = "swr_tx";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio108";
|
|
drive-strength = <2>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
tx_swr_data2_active: tx_swr_data2_active {
|
|
mux {
|
|
pins = "gpio108";
|
|
function = "swr_tx";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio108";
|
|
drive-strength = <10>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
rx_swr_clk_sleep: rx_swr_clk_sleep {
|
|
mux {
|
|
pins = "gpio110";
|
|
function = "swr_rx";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio110";
|
|
drive-strength = <2>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
rx_swr_clk_active: rx_swr_clk_active {
|
|
mux {
|
|
pins = "gpio110";
|
|
function = "swr_rx";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio110";
|
|
drive-strength = <10>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
rx_swr_data_sleep: rx_swr_data_sleep {
|
|
mux {
|
|
pins = "gpio111", "gpio112";
|
|
function = "swr_rx";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio111", "gpio112";
|
|
drive-strength = <2>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
rx_swr_data_active: rx_swr_data_active {
|
|
mux {
|
|
pins = "gpio111", "gpio112";
|
|
function = "swr_rx";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio111", "gpio112";
|
|
drive-strength = <10>;
|
|
bias-bus-hold;
|
|
};
|
|
};
|
|
|
|
pmx_sde: pmx_sde {
|
|
sde_dsi_active: sde_dsi_active {
|
|
mux {
|
|
pins = "gpio90";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable = <0>; /* no pull */
|
|
};
|
|
};
|
|
|
|
sde_dsi_suspend: sde_dsi_suspend {
|
|
mux {
|
|
pins = "gpio90";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sde_te {
|
|
sde_te_active: sde_te_active {
|
|
mux {
|
|
pins = "gpio89";
|
|
function = "mdp_vsync";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio89";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
|
|
sde_te_suspend: sde_te_suspend {
|
|
mux {
|
|
pins = "gpio89";
|
|
function = "mdp_vsync";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio89";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
};
|
|
|
|
sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
bias-disable;
|
|
drive-strength = <16>;
|
|
};
|
|
};
|
|
|
|
sde_dp_usbplug_cc_suspend: sde_dp_usbplug_cc_suspend {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
bias-pull-down;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
sde_dp_hotplug_ctrl: sde_dp_hotplug_ctrl {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "dp_hot";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
bias-disable;
|
|
input-enable;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
sde_dp_hotplug_tlmm: sde_dp_hotplug_tlmm {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
bias-disable;
|
|
input-enable;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
/* SDC pin type */
|
|
sdc1_clk_on: sdc1_clk_on {
|
|
config {
|
|
pins = "sdc1_clk";
|
|
bias-disable; /* NO pull */
|
|
drive-strength = <16>; /* 16 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_clk_off: sdc1_clk_off {
|
|
config {
|
|
pins = "sdc1_clk";
|
|
bias-disable; /* NO pull */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_cmd_on: sdc1_cmd_on {
|
|
config {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <10>; /* 10 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_cmd_off: sdc1_cmd_off {
|
|
config {
|
|
pins = "sdc1_cmd";
|
|
num-grp-pins = <1>;
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_data_on: sdc1_data_on {
|
|
config {
|
|
pins = "sdc1_data";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <10>; /* 10 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_data_off: sdc1_data_off {
|
|
config {
|
|
pins = "sdc1_data";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_rclk_on: sdc1_rclk_on {
|
|
config {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down; /* pull down */
|
|
};
|
|
};
|
|
|
|
sdc1_rclk_off: sdc1_rclk_off {
|
|
config {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down; /* pull down */
|
|
};
|
|
};
|
|
|
|
sdc2_clk_on: sdc2_clk_on {
|
|
config {
|
|
pins = "sdc2_clk";
|
|
bias-disable; /* NO pull */
|
|
drive-strength = <16>; /* 16 MA */
|
|
};
|
|
};
|
|
|
|
sdc2_clk_off: sdc2_clk_off {
|
|
config {
|
|
pins = "sdc2_clk";
|
|
bias-disable; /* NO pull */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
sdc2_cmd_on: sdc2_cmd_on {
|
|
config {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <10>; /* 10 MA */
|
|
};
|
|
};
|
|
|
|
sdc2_cmd_off: sdc2_cmd_off {
|
|
config {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
sdc2_data_on: sdc2_data_on {
|
|
config {
|
|
pins = "sdc2_data";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <10>; /* 10 MA */
|
|
};
|
|
};
|
|
|
|
sdc2_data_off: sdc2_data_off {
|
|
config {
|
|
pins = "sdc2_data";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
sdc2_cd_on: cd_on {
|
|
mux {
|
|
pins = "gpio98";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio98";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
sdc2_cd_off: cd_off {
|
|
mux {
|
|
pins = "gpio98";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio98";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
ufs_dev_reset_assert: ufs_dev_reset_assert {
|
|
config {
|
|
pins = "ufs_reset";
|
|
bias-pull-down; /* default: pull down */
|
|
/*
|
|
* UFS_RESET driver strengths are having
|
|
* different values/steps compared to typical
|
|
* GPIO drive strengths.
|
|
*
|
|
* Following table clarifies:
|
|
*
|
|
* HDRV value | UFS_RESET | Typical GPIO
|
|
* (dec) | (mA) | (mA)
|
|
* 0 | 0.8 | 2
|
|
* 1 | 1.55 | 4
|
|
* 2 | 2.35 | 6
|
|
* 3 | 3.1 | 8
|
|
* 4 | 3.9 | 10
|
|
* 5 | 4.65 | 12
|
|
* 6 | 5.4 | 14
|
|
* 7 | 6.15 | 16
|
|
*
|
|
* POR value for UFS_RESET HDRV is 3 which means
|
|
* 3.1mA and we want to use that. Hence just
|
|
* specify 8mA to "drive-strength" binding and
|
|
* that should result into writing 3 to HDRV
|
|
* field.
|
|
*/
|
|
drive-strength = <8>; /* default: 3.1 mA */
|
|
output-low; /* active low reset */
|
|
};
|
|
};
|
|
|
|
ufs_dev_reset_deassert: ufs_dev_reset_deassert {
|
|
config {
|
|
pins = "ufs_reset";
|
|
bias-pull-down; /* default: pull down */
|
|
/*
|
|
* default: 3.1 mA
|
|
* check comments under ufs_dev_reset_assert
|
|
*/
|
|
drive-strength = <8>;
|
|
output-high; /* active low reset */
|
|
};
|
|
};
|
|
|
|
pmx_ts_int_active {
|
|
ts_int_active: ts_int_active {
|
|
mux {
|
|
pins = "gpio88";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio88";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_int_suspend {
|
|
ts_int_suspend: ts_int_suspend {
|
|
mux {
|
|
pins = "gpio88";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio88";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_reset_active {
|
|
ts_reset_active: ts_reset_active {
|
|
mux {
|
|
pins = "gpio87";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio87";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_reset_suspend {
|
|
ts_reset_suspend: ts_reset_suspend {
|
|
mux {
|
|
pins = "gpio87";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio87";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_release {
|
|
ts_release: ts_release {
|
|
mux {
|
|
pins = "gpio88", "gpio87";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio88", "gpio87";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
cci0_active: cci0_active {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio37", "gpio38";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio37", "gpio38";
|
|
bias-pull-up; /* PULL UP*/
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci0_suspend: cci0_suspend {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio37", "gpio38";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio37", "gpio38";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci1_active: cci1_active {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio39", "gpio40";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio39", "gpio40";
|
|
bias-pull-up; /* PULL UP*/
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci1_suspend: cci1_suspend {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio39", "gpio40";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio39", "gpio40";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk0_active: cam_sensor_mclk0_active {
|
|
/* MCLK0 */
|
|
mux {
|
|
pins = "gpio34";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio34";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend {
|
|
/* MCLK0 */
|
|
mux {
|
|
pins = "gpio34";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio34";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_rear_active: cam_sensor_rear_active {
|
|
/* RESET */
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_rear_suspend: cam_sensor_rear_suspend {
|
|
/* RESET */
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_front_active: cam_sensor_front_active {
|
|
/* RESET */
|
|
mux {
|
|
pins = "gpio42";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio42";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_front_suspend: cam_sensor_front_suspend {
|
|
/* RESET */
|
|
mux {
|
|
pins = "gpio42";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio42";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_rear2_active: cam_sensor_rear2_active {
|
|
/* RESET */
|
|
mux {
|
|
pins = "gpio46";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio46";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_rear2_suspend: cam_sensor_rear2_suspend {
|
|
/* RESET */
|
|
mux {
|
|
pins = "gpio46";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio46";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk1_active: cam_sensor_mclk1_active {
|
|
/* MCLK1 */
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend {
|
|
/* MCLK1 */
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk2_active: cam_sensor_mclk2_active {
|
|
/* MCLK2 */
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend {
|
|
/* MCLK2 */
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
fpc_reset_int: fpc_reset_int {
|
|
fpc_reset_low: reset_low {
|
|
mux {
|
|
pins = "gpio93";
|
|
function = "gpio";
|
|
};
|
|
config {
|
|
pins = "gpio93";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
fpc_reset_high: reset_high {
|
|
mux {
|
|
pins = "gpio93";
|
|
function = "gpio";
|
|
};
|
|
config {
|
|
pins = "gpio93";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
fpc_int_low: int_low {
|
|
mux {
|
|
pins = "gpio92";
|
|
function = "gpio";
|
|
};
|
|
config {
|
|
pins = "gpio92";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pm6125_gpios {
|
|
tasha_mclk {
|
|
tasha_mclk_default: tasha_mclk_default{
|
|
pins = "gpio1";
|
|
function = "func1";
|
|
qcom,drive-strength = <2>;
|
|
power-source = <0>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
};
|