341 lines
8.9 KiB
Devicetree
341 lines
8.9 KiB
Devicetree
/*
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* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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&soc {
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cam_vfe0: qcom,vfe0@acaf000 {
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cell-index = <0>;
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compatible = "qcom,vfe175";
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reg-names = "ife", "cam_camnoc";
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reg = <0xacaf000 0x4000>,
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<0xac42000 0x5000>;
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reg-cam-base = <0xaf000 0x42000>;
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interrupt-names = "ife";
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interrupts = <0 465 0>;
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regulator-names = "camss", "ife0";
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camss-supply = <&titan_top_gdsc>;
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ife0-supply = <&ife_0_gdsc>;
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clock-names =
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"ife_clk_src",
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"ife_clk",
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"ife_axi_clk";
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clocks =
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<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
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<&clock_camcc CAM_CC_IFE_0_CLK>,
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<&clock_camcc CAM_CC_IFE_0_AXI_CLK>;
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clock-rates =
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<400000000 0 0>,
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<558000000 0 0>,
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<637000000 0 0>,
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<847000000 0 0>,
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<950000000 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1",
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"nominal", "turbo";
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src-clock-name = "ife_clk_src";
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clock-control-debugfs = "true";
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clock-names-option = "ife_dsp_clk";
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clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>;
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clock-rates-option = <760000000>;
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status = "ok"
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};
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cam_csid0: qcom,csid0@acb3000 {
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cell-index = <0>;
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compatible = "qcom,csid175";
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reg-names = "csid";
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reg = <0xacb3000 0x1000>;
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reg-cam-base = <0xb3000>;
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interrupt-names = "csid";
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interrupts = <0 464 0>;
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regulator-names = "camss", "ife0";
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camss-supply = <&titan_top_gdsc>;
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ife0-supply = <&ife_0_gdsc>;
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clock-names =
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"ife_csid_clk_src",
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"ife_csid_clk",
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"cphy_rx_clk_src",
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"ife_cphy_rx_clk",
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"ife_clk_src",
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"ife_clk",
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"ife_axi_clk";
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clocks =
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<&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
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<&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
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<&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
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<&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
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<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
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<&clock_camcc CAM_CC_IFE_0_CLK>,
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<&clock_camcc CAM_CC_IFE_0_AXI_CLK>;
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clock-rates =
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<400000000 0 0 0 400000000 0 0>,
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<400000000 0 0 0 558000000 0 0>,
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<480000000 0 0 0 637000000 0 0>,
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<600000000 0 0 0 847000000 0 0>,
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<600000000 0 0 0 950000000 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1",
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"nominal", "turbo";
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src-clock-name = "ife_csid_clk_src";
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clock-control-debugfs = "true";
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status = "ok"
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};
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cam_vfe1: qcom,vfe1@acb6000 {
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cell-index = <1>;
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compatible = "qcom,vfe175";
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reg-names = "ife", "cam_camnoc";
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reg = <0xacb6000 0x4000>,
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<0xac42000 0x5000>;
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reg-cam-base = <0xb6000 0x42000>;
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interrupt-names = "ife";
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interrupts = <0 467 0>;
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regulator-names = "camss", "ife1";
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camss-supply = <&titan_top_gdsc>;
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ife1-supply = <&ife_1_gdsc>;
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clock-names =
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"ife_clk_src",
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"ife_clk",
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"ife_axi_clk";
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clocks =
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<&clock_camcc CAM_CC_IFE_1_CLK_SRC>,
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<&clock_camcc CAM_CC_IFE_1_CLK>,
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<&clock_camcc CAM_CC_IFE_1_AXI_CLK>;
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clock-rates =
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<400000000 0 0>,
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<558000000 0 0>,
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<637000000 0 0>,
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<847000000 0 0>,
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<950000000 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1",
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"nominal", "turbo";
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src-clock-name = "ife_clk_src";
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clock-control-debugfs = "true";
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clock-names-option = "ife_dsp_clk";
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clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>;
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clock-rates-option = <760000000>;
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status = "ok"
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};
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cam_csid1: qcom,csid1@acba000 {
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cell-index = <1>;
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compatible = "qcom,csid175";
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reg-names = "csid";
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reg = <0xacba000 0x1000>;
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reg-cam-base = <0xba000>;
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interrupt-names = "csid";
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interrupts = <0 466 0>;
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regulator-names = "camss", "ife1";
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camss-supply = <&titan_top_gdsc>;
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ife1-supply = <&ife_1_gdsc>;
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clock-names =
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"ife_csid_clk_src",
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"ife_csid_clk",
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"cphy_rx_clk_src",
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"ife_cphy_rx_clk",
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"ife_clk_src",
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"ife_clk",
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"ife_axi_clk";
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clocks =
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<&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>,
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<&clock_camcc CAM_CC_IFE_1_CSID_CLK>,
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<&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
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<&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
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<&clock_camcc CAM_CC_IFE_1_CLK_SRC>,
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<&clock_camcc CAM_CC_IFE_1_CLK>,
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<&clock_camcc CAM_CC_IFE_1_AXI_CLK>;
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clock-rates =
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<400000000 0 0 0 400000000 0 0>,
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<400000000 0 0 0 558000000 0 0>,
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<480000000 0 0 0 637000000 0 0>,
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<600000000 0 0 0 847000000 0 0>,
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<600000000 0 0 0 950000000 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1",
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"nominal", "turbo";
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src-clock-name = "ife_csid_clk_src";
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clock-control-debugfs = "true";
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status = "ok"
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};
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qcom,cam_smmu {
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compatible = "qcom,msm-cam-smmu";
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status = "ok"
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msm_cam_smmu_ife {
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compatible = "qcom,msm-cam-smmu-cb";
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iommus = <&apps_smmu 0x840 0x620>,
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<&apps_smmu 0x860 0x620>,
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<&apps_smmu 0xA40 0x620>,
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<&apps_smmu 0xA60 0x620>,
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<&apps_smmu 0xC40 0x620>,
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<&apps_smmu 0xC60 0x620>,
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<&apps_smmu 0xE40 0x620>,
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<&apps_smmu 0xE60 0x620>;
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label = "ife";
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ife_iova_mem_map: iova-mem-map {
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/* IO region is approximately 3.4 GB */
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iova-mem-region-io {
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iova-region-name = "io";
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iova-region-start = <0x7400000>;
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iova-region-len = <0xd8c00000>;
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iova-region-id = <0x3>;
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status = "ok"
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};
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};
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};
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msm_cam_smmu_jpeg {
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compatible = "qcom,msm-cam-smmu-cb";
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iommus = <&apps_smmu 0x2180 0x20>,
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<&apps_smmu 0x21A0 0x20>;
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label = "jpeg";
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jpeg_iova_mem_map: iova-mem-map {
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/* IO region is approximately 3.4 GB */
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iova-mem-region-io {
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iova-region-name = "io";
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iova-region-start = <0x7400000>;
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iova-region-len = <0xd8c00000>;
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iova-region-id = <0x3>;
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status = "ok"
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};
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};
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};
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msm_cam_icp_fw {
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compatible = "qcom,msm-cam-smmu-fw-dev";
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label="icp";
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memory-region = <&pil_camera_mem>;
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};
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msm_cam_smmu_icp {
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compatible = "qcom,msm-cam-smmu-cb";
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iommus = <&apps_smmu 0x2222 0x0>,
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<&apps_smmu 0x2080 0x20>,
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<&apps_smmu 0x20A0 0x20>,
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<&apps_smmu 0x2100 0x20>,
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<&apps_smmu 0x2120 0x20>,
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<&apps_smmu 0x20C0 0x0>,
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<&apps_smmu 0x2140 0x0>;
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label = "icp";
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icp_iova_mem_map: iova-mem-map {
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iova-mem-region-firmware {
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/* Firmware region is 5MB */
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iova-region-name = "firmware";
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iova-region-start = <0x0>;
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iova-region-len = <0x500000>;
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iova-region-id = <0x0>;
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status = "ok"
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};
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iova-mem-region-shared {
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/* Shared region is 150MB long */
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iova-region-name = "shared";
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iova-region-start = <0x7400000>;
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iova-region-len = <0x9600000>;
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iova-region-id = <0x1>;
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status = "ok"
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};
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iova-mem-region-secondary-heap {
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/* Secondary heap region is 1MB long */
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iova-region-name = "secheap";
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iova-region-start = <0x10A00000>;
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iova-region-len = <0x100000>;
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iova-region-id = <0x4>;
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status = "ok"
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};
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iova-mem-region-io {
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/* IO region is approximately 3.3 GB */
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iova-region-name = "io";
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iova-region-start = <0x10C00000>;
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iova-region-len = <0xCF300000>;
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iova-region-id = <0x3>;
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status = "ok"
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};
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iova-mem-qdss-region {
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/* QDSS region is appropriate 1MB */
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iova-region-name = "qdss";
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iova-region-start = <0x10B00000>;
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iova-region-len = <0x100000>;
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iova-region-id = <0x5>;
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qdss-phy-addr = <0x16790000>;
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status = "ok"
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};
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};
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};
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msm_cam_smmu_cpas_cdm {
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compatible = "qcom,msm-cam-smmu-cb";
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iommus = <&apps_smmu 0x2000 0x0>;
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label = "cpas-cdm0";
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cpas_cdm_iova_mem_map: iova-mem-map {
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iova-mem-region-io {
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/* IO region is approximately 3.4 GB */
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iova-region-name = "io";
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iova-region-start = <0x7400000>;
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iova-region-len = <0xd8c00000>;
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iova-region-id = <0x3>;
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status = "ok"
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};
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};
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};
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msm_cam_smmu_secure {
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compatible = "qcom,msm-cam-smmu-cb";
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label = "cam-secure";
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qcom,secure-cb;
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};
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msm_cam_smmu_fd {
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compatible = "qcom,msm-cam-smmu-cb";
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iommus = <&apps_smmu 0x21C0 0x20>,
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<&apps_smmu 0x21E0 0x20>;
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label = "fd";
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fd_iova_mem_map: iova-mem-map {
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iova-mem-region-io {
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/* IO region is approximately 3.4 GB */
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iova-region-name = "io";
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iova-region-start = <0x7400000>;
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iova-region-len = <0xd8c00000>;
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iova-region-id = <0x3>;
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status = "ok"
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};
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};
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};
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msm_cam_smmu_lrme {
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compatible = "qcom,msm-cam-smmu-cb";
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iommus = <&apps_smmu 0x20e0 0x0>,
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<&apps_smmu 0x2160 0x0>;
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label = "lrme";
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lrme_iova_mem_map: iova-mem-map {
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iova-mem-region-shared {
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/* Shared region is 100MB long */
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iova-region-name = "shared";
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iova-region-start = <0x7400000>;
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iova-region-len = <0x6400000>;
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iova-region-id = <0x1>;
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status = "ok"
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};
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/* IO region is approximately 3.3 GB */
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iova-mem-region-io {
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iova-region-name = "io";
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iova-region-start = <0xd800000>;
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iova-region-len = <0xd2800000>;
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iova-region-id = <0x3>;
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status = "ok"
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};
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};
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};
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};
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};
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