231 lines
5.6 KiB
Devicetree
231 lines
5.6 KiB
Devicetree
/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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&soc {
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/* GDSCs in Global CC */
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pcie_0_gdsc: qcom,gdsc@16b004 {
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compatible = "qcom,gdsc";
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regulator-name = "pcie_0_gdsc";
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reg = <0x16b004 0x4>;
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qcom,poll-cfg-gdscr;
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status = "disabled";
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};
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ufs_phy_gdsc: qcom,gdsc@177004 {
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compatible = "qcom,gdsc";
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regulator-name = "ufs_phy_gdsc";
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reg = <0x177004 0x4>;
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qcom,poll-cfg-gdscr;
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status = "disabled";
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};
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usb30_prim_gdsc: qcom,gdsc@10f004 {
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compatible = "qcom,gdsc";
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regulator-name = "usb30_prim_gdsc";
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reg = <0x10f004 0x4>;
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qcom,poll-cfg-gdscr;
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status = "disabled";
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};
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hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc: qcom,gdsc@17d030 {
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compatible = "qcom,gdsc";
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regulator-name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc";
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reg = <0x17d030 0x4>;
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qcom,no-status-check-on-disable;
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qcom,gds-timeout = <500>;
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status = "disabled";
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};
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hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc: qcom,gdsc@17d03c {
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compatible = "qcom,gdsc";
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regulator-name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc";
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reg = <0x17d03c 0x4>;
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qcom,no-status-check-on-disable;
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qcom,gds-timeout = <500>;
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status = "disabled";
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};
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hlos1_vote_aggre_noc_mmu_tbu1_gdsc: qcom,gdsc@17d034 {
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compatible = "qcom,gdsc";
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regulator-name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc";
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reg = <0x17d034 0x4>;
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qcom,no-status-check-on-disable;
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qcom,gds-timeout = <500>;
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status = "disabled";
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};
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hlos1_vote_aggre_noc_mmu_tbu2_gdsc: qcom,gdsc@17d038 {
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compatible = "qcom,gdsc";
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regulator-name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc";
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reg = <0x17d038 0x4>;
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qcom,no-status-check-on-disable;
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qcom,gds-timeout = <500>;
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status = "disabled";
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};
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hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc: qcom,gdsc@17d040 {
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compatible = "qcom,gdsc";
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regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";
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reg = <0x17d040 0x4>;
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qcom,no-status-check-on-disable;
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qcom,gds-timeout = <500>;
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status = "disabled";
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};
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hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc: qcom,gdsc@17d048 {
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compatible = "qcom,gdsc";
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regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";
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reg = <0x17d048 0x4>;
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qcom,no-status-check-on-disable;
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qcom,gds-timeout = <500>;
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status = "disabled";
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};
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hlos1_vote_mmnoc_mmu_tbu_sf_gdsc: qcom,gdsc@17d044 {
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compatible = "qcom,gdsc";
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regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc";
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reg = <0x17d044 0x4>;
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qcom,no-status-check-on-disable;
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qcom,gds-timeout = <500>;
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status = "disabled";
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};
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/* GDSCs in Camera CC */
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bps_gdsc: qcom,gdsc@ad07004 {
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compatible = "qcom,gdsc";
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regulator-name = "bps_gdsc";
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reg = <0xad07004 0x4>;
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qcom,poll-cfg-gdscr;
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status = "disabled";
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};
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ife_0_gdsc: qcom,gdsc@ad0a004 {
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compatible = "qcom,gdsc";
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regulator-name = "ife_0_gdsc";
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reg = <0xad0a004 0x4>;
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qcom,poll-cfg-gdscr;
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status = "disabled";
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};
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ife_1_gdsc: qcom,gdsc@ad0b004 {
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compatible = "qcom,gdsc";
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regulator-name = "ife_1_gdsc";
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reg = <0xad0b004 0x4>;
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qcom,poll-cfg-gdscr;
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status = "disabled";
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};
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ipe_0_gdsc: qcom,gdsc@ad08004 {
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compatible = "qcom,gdsc";
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regulator-name = "ipe_0_gdsc";
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reg = <0xad08004 0x4>;
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qcom,poll-cfg-gdscr;
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status = "disabled";
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};
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ipe_1_gdsc: qcom,gdsc@ad09004 {
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compatible = "qcom,gdsc";
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regulator-name = "ipe_1_gdsc";
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reg = <0xad09004 0x4>;
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qcom,poll-cfg-gdscr;
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status = "disabled";
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};
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titan_top_gdsc: qcom,gdsc@ad0c1c4 {
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compatible = "qcom,gdsc";
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regulator-name = "titan_top_gdsc";
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reg = <0xad0c1c4 0x4>;
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qcom,poll-cfg-gdscr;
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status = "disabled";
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};
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/* GDSCs in Display CC */
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mdss_core_gdsc: qcom,gdsc@0f03000 {
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compatible = "qcom,gdsc";
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regulator-name = "mdss_core_gdsc";
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reg = <0xaf03000 0x4>;
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qcom,poll-cfg-gdscr;
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qcom,support-hw-trigger;
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status = "disabled";
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proxy-supply = <&mdss_core_gdsc>;
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qcom,proxy-consumer-enable;
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};
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/* GDSCs in Graphics CC */
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gpu_cx_hw_ctrl: syscon@5091540 {
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compatible = "syscon";
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reg = <0x5091540 0x4>;
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};
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gpu_gx_domain_addr: syscon@0x5091508 {
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compatible = "syscon";
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reg = <0x5091508 0x4>;
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};
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gpu_gx_sw_reset: syscon@0x5091008 {
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compatible = "syscon";
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reg = <0x5091008 0x4>;
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};
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gpu_cx_gdsc: qcom,gdsc@509106c {
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compatible = "qcom,gdsc";
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regulator-name = "gpu_cx_gdsc";
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reg = <0x509106c 0x4>;
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hw-ctrl-addr = <&gpu_cx_hw_ctrl>;
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qcom,no-status-check-on-disable;
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qcom,gds-timeout = <500>;
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qcom,clk-dis-wait-val = <8>;
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status = "disabled";
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};
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gpu_gx_gdsc: qcom,gdsc@509100c {
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compatible = "qcom,gdsc";
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regulator-name = "gpu_gx_gdsc";
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reg = <0x509100c 0x4>;
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qcom,poll-cfg-gdscr;
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domain-addr = <&gpu_gx_domain_addr>;
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sw-reset = <&gpu_gx_sw_reset>;
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status = "disabled";
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};
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/* GDSCs in Video CC */
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mvsc_gdsc: qcom,gdsc@0b00814 {
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compatible = "qcom,gdsc";
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regulator-name = "mvsc_gdsc";
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reg = <0xab00814 0x4>;
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status = "disabled";
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};
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mvs0_gdsc: qcom,gdsc@ab00874 {
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compatible = "qcom,gdsc";
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regulator-name = "mvs0_gdsc";
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reg = <0xab00874 0x4>;
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status = "disabled";
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};
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mvs1_gdsc: qcom,gdsc@ab008b4 {
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compatible = "qcom,gdsc";
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regulator-name = "mvs1_gdsc";
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reg = <0xab008b4 0x4>;
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status = "disabled";
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};
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/* GDSCs in NPU CC */
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npu_core_gdsc: qcom,gdsc@9911028 {
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compatible = "qcom,gdsc";
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regulator-name = "npu_core_gdsc";
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reg = <0x9911028 0x4>;
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status = "disabled";
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};
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};
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