114 lines
3.9 KiB
C
114 lines
3.9 KiB
C
/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_SDMMAGPIE_H
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#define _DT_BINDINGS_CLK_QCOM_CAM_CC_SDMMAGPIE_H
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/* Hardware clocks */
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#define CAM_CC_PLL0_OUT_EVEN 0
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#define CAM_CC_PLL0_OUT_ODD 1
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#define CAM_CC_PLL1_OUT_EVEN 2
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#define CAM_CC_PLL2_OUT_EARLY 3
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#define CAM_CC_PLL3_OUT_EVEN 4
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#define CAM_CC_PLL4_OUT_EVEN 5
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/* CAM_CC clock registers */
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#define CAM_CC_PLL0 6
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#define CAM_CC_PLL1 7
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#define CAM_CC_PLL2 8
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#define CAM_CC_PLL2_OUT_AUX 9
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#define CAM_CC_PLL2_OUT_MAIN 10
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#define CAM_CC_PLL3 11
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#define CAM_CC_PLL4 12
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#define CAM_CC_BPS_AHB_CLK 13
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#define CAM_CC_BPS_AREG_CLK 14
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#define CAM_CC_BPS_AXI_CLK 15
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#define CAM_CC_BPS_CLK 16
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#define CAM_CC_BPS_CLK_SRC 17
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#define CAM_CC_CAMNOC_AXI_CLK 18
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#define CAM_CC_CAMNOC_AXI_CLK_SRC 19
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#define CAM_CC_CAMNOC_DCD_XO_CLK 20
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#define CAM_CC_CCI_0_CLK 21
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#define CAM_CC_CCI_0_CLK_SRC 22
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#define CAM_CC_CCI_1_CLK 23
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#define CAM_CC_CCI_1_CLK_SRC 24
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#define CAM_CC_CORE_AHB_CLK 25
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#define CAM_CC_CPAS_AHB_CLK 26
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#define CAM_CC_CPHY_RX_CLK_SRC 27
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#define CAM_CC_CSI0PHYTIMER_CLK 28
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#define CAM_CC_CSI0PHYTIMER_CLK_SRC 29
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#define CAM_CC_CSI1PHYTIMER_CLK 30
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#define CAM_CC_CSI1PHYTIMER_CLK_SRC 31
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#define CAM_CC_CSI2PHYTIMER_CLK 32
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#define CAM_CC_CSI2PHYTIMER_CLK_SRC 33
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#define CAM_CC_CSI3PHYTIMER_CLK 34
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#define CAM_CC_CSI3PHYTIMER_CLK_SRC 35
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#define CAM_CC_CSIPHY0_CLK 36
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#define CAM_CC_CSIPHY1_CLK 37
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#define CAM_CC_CSIPHY2_CLK 38
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#define CAM_CC_CSIPHY3_CLK 39
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#define CAM_CC_FAST_AHB_CLK_SRC 40
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#define CAM_CC_FD_CORE_CLK 41
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#define CAM_CC_FD_CORE_CLK_SRC 42
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#define CAM_CC_FD_CORE_UAR_CLK 43
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#define CAM_CC_GDSC_CLK 44
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#define CAM_CC_ICP_AHB_CLK 45
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#define CAM_CC_ICP_CLK 46
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#define CAM_CC_ICP_CLK_SRC 47
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#define CAM_CC_IFE_0_AXI_CLK 48
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#define CAM_CC_IFE_0_CLK 49
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#define CAM_CC_IFE_0_CLK_SRC 50
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#define CAM_CC_IFE_0_CPHY_RX_CLK 51
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#define CAM_CC_IFE_0_CSID_CLK 52
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#define CAM_CC_IFE_0_CSID_CLK_SRC 53
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#define CAM_CC_IFE_0_DSP_CLK 54
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#define CAM_CC_IFE_1_AXI_CLK 55
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#define CAM_CC_IFE_1_CLK 56
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#define CAM_CC_IFE_1_CLK_SRC 57
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#define CAM_CC_IFE_1_CPHY_RX_CLK 58
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#define CAM_CC_IFE_1_CSID_CLK 59
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#define CAM_CC_IFE_1_CSID_CLK_SRC 60
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#define CAM_CC_IFE_1_DSP_CLK 61
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#define CAM_CC_IFE_LITE_CLK 62
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#define CAM_CC_IFE_LITE_CLK_SRC 63
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#define CAM_CC_IFE_LITE_CPHY_RX_CLK 64
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#define CAM_CC_IFE_LITE_CSID_CLK 65
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#define CAM_CC_IFE_LITE_CSID_CLK_SRC 66
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#define CAM_CC_IPE_0_AHB_CLK 67
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#define CAM_CC_IPE_0_AREG_CLK 68
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#define CAM_CC_IPE_0_AXI_CLK 69
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#define CAM_CC_IPE_0_CLK 70
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#define CAM_CC_IPE_0_CLK_SRC 71
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#define CAM_CC_IPE_1_AHB_CLK 72
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#define CAM_CC_IPE_1_AREG_CLK 73
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#define CAM_CC_IPE_1_AXI_CLK 74
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#define CAM_CC_IPE_1_CLK 75
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#define CAM_CC_JPEG_CLK 76
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#define CAM_CC_JPEG_CLK_SRC 77
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#define CAM_CC_LRME_CLK 78
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#define CAM_CC_LRME_CLK_SRC 79
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#define CAM_CC_MCLK0_CLK 80
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#define CAM_CC_MCLK0_CLK_SRC 81
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#define CAM_CC_MCLK1_CLK 82
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#define CAM_CC_MCLK1_CLK_SRC 83
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#define CAM_CC_MCLK2_CLK 84
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#define CAM_CC_MCLK2_CLK_SRC 85
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#define CAM_CC_MCLK3_CLK 86
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#define CAM_CC_MCLK3_CLK_SRC 87
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#define CAM_CC_SLEEP_CLK 88
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#define CAM_CC_SLEEP_CLK_SRC 89
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#define CAM_CC_SLOW_AHB_CLK_SRC 90
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#define CAM_CC_XO_CLK_SRC 91
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#endif
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