52 lines
1.5 KiB
Plaintext
52 lines
1.5 KiB
Plaintext
Qualcomm Technologies, Inc. OSM Bindings
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Operating State Manager (OSM) is a hardware engine used by some Qualcomm
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Technologies, Inc. (QTI) SoCs to manage frequency and voltage scaling
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in hardware. OSM is capable of controlling frequency and voltage requests
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for multiple clusters via the existence of multiple OSM domains.
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Properties:
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- compatible
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Usage: required
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Value type: <string>
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Definition: must be "qcom,clk-cpu-osm" or "qcom,clk-cpu-osm-sdmshrike"
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or "qcom,clk-cpu-osm-sm6150" or
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"qcom,clk-cpu-osm-sdmmagpie" or
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"qcom,clk-cpu-osm-trinket" or
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"qcom,clk-cpu-osm-atoll".
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- reg
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Addresses and sizes for the memory of the OSM controller.
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- reg-names
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Usage: required
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Value type: <stringlist>
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Definition: Address names. Must be "osm_l3_base", "osm_pwrcl_base",
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and "osm_perfcl_base". Can optionally have
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"osm_perfpcl_base".
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Must be specified in the same order as the corresponding
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addresses are specified in the reg property.
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- l3-devs
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Usage: optional
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Value type: <phandle>
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Definition: List of phandles to devices that the OPP tables with the L3
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frequency and voltage mappings are loaded for.
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Example:
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clock_cpucc: qcom,cpucc {
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compatible = "qcom,clk-cpu-osm";
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reg = <0x18321000 0x1400>,
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<0x18323000 0x1400>,
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<0x18325800 0x1400>,
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<0x18327800 0x1400>;
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reg-names = "osm_l3_base", "osm_pwrcl_base",
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"osm_perfcl_base", "osm_perfpcl_base";
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l3-devs = <&phandle0 &phandle1 &phandle2>;
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#clock-cells = <1>;
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};
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