575 lines
9.4 KiB
Devicetree
575 lines
9.4 KiB
Devicetree
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/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "sm6150.dtsi"
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#include "sa6155-pmic.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. SA6155";
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compatible = "qcom,sa6155";
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qcom,msm-name = "SA6155";
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qcom,msm-id = <384 0x10000>;
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aliases {
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pci-domain0 = &pcie0; /* PCIe0 domain */
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};
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};
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&tpdm_west {
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status = "disabled";
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};
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&qusb_phy0 {
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vdd-supply = <&L5A>;
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vdda18-supply = <&L12A>;
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vdda33-supply = <&L13A>;
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};
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&usb_qmp_phy {
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vdd-supply = <&L5A>;
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core-supply = <&L12A>;
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};
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&qusb_phy1 {
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vdd-supply = <&L5A>;
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vdda18-supply = <&L12A>;
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vdda33-supply = <&L13A>;
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};
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&ipa_hw {
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status="disabled";
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};
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&mdss_dsi0_pll {
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/delete-property/ qcom,dsi-pll-ssc-en;
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};
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&slpi_tlmm {
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status = "ok"
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};
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&clock_gcc {
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compatible = "qcom,gcc-sa6155", "syscon";
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/delete-property/ protected-clocks;
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};
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&clock_videocc {
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compatible = "qcom,videocc-sa6155", "syscon";
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};
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&clock_dispcc {
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compatible = "qcom,dispcc-sa6155", "syscon";
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};
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&clock_scc {
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compatible = "qcom,scc-sa6155", "syscon";
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vdd_scc_cx-supply = <&VDD_CX_LEVEL>;
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status = "ok"
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};
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&clock_camcc {
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compatible = "qcom,camcc-sa6155", "syscon";
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vdd_mx-supply = <&VDD_CX_LEVEL>;
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};
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&clock_gpucc {
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compatible = "qcom,gpucc-sa6155", "syscon";
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vdd_mx-supply = <&VDD_CX_LEVEL>;
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};
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&mdss_mdp {
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/* roi misr related hw block */
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qcom,sde-roi-misr-off = <0x82820 0x82880 0x828e0>;
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qcom,sde-roi-misr-size = <0x60>;
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qcom,sde-dspp-blocks {
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qcom,sde-dspp-roi-misr = <0x1200 0x00010000>;
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};
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};
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#include "sa6155-pcie.dtsi"
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&soc {
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qfprom: qfprom@780130 {
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compatible = "qcom,qfprom";
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reg = <0x00780130 0x4>;
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#address-cells = <1>;
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#size-cells = <1>;
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read-only;
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ranges;
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};
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};
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&thermal_zones {
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lmh-dcvs-00 {
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trips {
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active-config {
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temperature = <105000>;
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hysteresis = <40000>;
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};
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};
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};
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lmh-dcvs-01 {
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trips {
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active-config {
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temperature = <105000>;
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hysteresis = <40000>;
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};
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};
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};
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cpuss-0-step {
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trips {
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cpu45-config {
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temperature = <115000>;
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};
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};
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};
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cpuss-1-step {
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trips {
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cpu23-config {
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temperature = <115000>;
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};
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};
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};
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cpuss-2-step {
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trips {
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cpu01-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-0-step {
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trips {
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cpu6-0-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-1-step {
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trips {
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cpu6-1-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-2-step {
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trips {
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cpu7-0-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-3-step {
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trips {
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cpu7-1-config {
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temperature = <115000>;
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};
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};
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};
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gpu-step {
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trips {
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gpu-trip {
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temperature = <105000>;
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};
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gpu-cx-mon {
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temperature = <110000>;
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};
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};
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};
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q6-hvx-step {
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trips {
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q6-hvx-config {
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temperature = <105000>;
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};
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q6-hvx-trip1 {
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temperature = <105000>;
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};
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q6-hvx-cx-mon {
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temperature = <110000>;
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};
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};
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};
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mdm-core-step {
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trips {
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mdm-core-cx-mon {
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temperature = <110000>;
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};
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};
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};
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camera-step {
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trips {
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camera-cx-mon {
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temperature = <110000>;
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};
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};
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};
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wlan-step {
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trips {
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wlan-cx-mon {
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temperature = <110000>;
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};
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};
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};
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display-step {
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trips {
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display-cx-mon {
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temperature = <110000>;
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};
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};
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};
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video-step {
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trips {
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video-cx-mon {
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temperature = <110000>;
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};
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};
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};
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quiet-therm-step {
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status = "disabled";
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};
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};
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/* GPU power level overrides */
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&msm_gpu {
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/*
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* Speed-bin zero is default speed bin.
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* For rest of the speed bins, speed-bin value
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* is calulated as FMAX/4.8 MHz round up to zero
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* decimal places.
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*/
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/delete-node/qcom,gpu-pwrlevel-bins;
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qcom,gpu-pwrlevel-bins {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible="qcom,gpu-pwrlevel-bins";
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qcom,gpu-pwrlevels-0 {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,speed-bin = <0>;
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qcom,initial-pwrlevel = <4>;
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qcom,ca-target-pwrlevel = <3>;
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/* TURBO */
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <845000000>;
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qcom,bus-freq = <11>;
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qcom,bus-min = <10>;
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qcom,bus-max = <11>;
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};
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/* NOM L1 */
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-freq = <745000000>;
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qcom,bus-freq = <10>;
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qcom,bus-min = <9>;
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qcom,bus-max = <11>;
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};
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/* NOM */
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-freq = <650000000>;
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qcom,bus-freq = <9>;
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qcom,bus-min = <8>;
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qcom,bus-max = <10>;
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};
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/* SVS L1 */
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-freq = <500000000>;
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qcom,bus-freq = <8>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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};
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/* SVS */
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-freq = <435000000>;
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qcom,bus-freq = <7>;
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qcom,bus-min = <5>;
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qcom,bus-max = <8>;
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};
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/* XO */
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-freq = <0>;
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qcom,bus-freq = <0>;
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qcom,bus-min = <0>;
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qcom,bus-max = <0>;
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};
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};
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qcom,gpu-pwrlevels-1 {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,speed-bin = <177>;
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qcom,initial-pwrlevel = <4>;
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qcom,ca-target-pwrlevel = <3>;
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/* TURBO */
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <845000000>;
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qcom,bus-freq = <11>;
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qcom,bus-min = <10>;
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qcom,bus-max = <11>;
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};
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/* NOM L1 */
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-freq = <745000000>;
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qcom,bus-freq = <10>;
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qcom,bus-min = <9>;
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qcom,bus-max = <11>;
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};
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/* NOM */
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-freq = <650000000>;
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qcom,bus-freq = <9>;
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qcom,bus-min = <8>;
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qcom,bus-max = <10>;
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};
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/* SVS L1 */
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-freq = <500000000>;
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qcom,bus-freq = <8>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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};
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/* SVS */
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-freq = <435000000>;
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qcom,bus-freq = <7>;
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qcom,bus-min = <5>;
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qcom,bus-max = <8>;
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};
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/* XO */
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-freq = <0>;
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qcom,bus-freq = <0>;
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qcom,bus-min = <0>;
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qcom,bus-max = <0>;
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};
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};
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qcom,gpu-pwrlevels-2 {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,speed-bin = <156>;
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qcom,initial-pwrlevel = <3>;
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qcom,ca-target-pwrlevel = <2>;
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/* NOM L1 */
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <745000000>;
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qcom,bus-freq = <11>;
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qcom,bus-min = <10>;
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qcom,bus-max = <11>;
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};
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/* NOM */
|
||
|
|
qcom,gpu-pwrlevel@1 {
|
||
|
|
reg = <1>;
|
||
|
|
qcom,gpu-freq = <650000000>;
|
||
|
|
qcom,bus-freq = <9>;
|
||
|
|
qcom,bus-min = <8>;
|
||
|
|
qcom,bus-max = <10>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* SVS L1 */
|
||
|
|
qcom,gpu-pwrlevel@2 {
|
||
|
|
reg = <2>;
|
||
|
|
qcom,gpu-freq = <500000000>;
|
||
|
|
qcom,bus-freq = <8>;
|
||
|
|
qcom,bus-min = <7>;
|
||
|
|
qcom,bus-max = <9>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* SVS */
|
||
|
|
qcom,gpu-pwrlevel@3 {
|
||
|
|
reg = <3>;
|
||
|
|
qcom,gpu-freq = <435000000>;
|
||
|
|
qcom,bus-freq = <7>;
|
||
|
|
qcom,bus-min = <5>;
|
||
|
|
qcom,bus-max = <8>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* XO */
|
||
|
|
qcom,gpu-pwrlevel@4 {
|
||
|
|
reg = <4>;
|
||
|
|
qcom,gpu-freq = <0>;
|
||
|
|
qcom,bus-freq = <0>;
|
||
|
|
qcom,bus-min = <0>;
|
||
|
|
qcom,bus-max = <0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,gpu-pwrlevels-3 {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
qcom,speed-bin = <136>;
|
||
|
|
|
||
|
|
qcom,initial-pwrlevel = <2>;
|
||
|
|
qcom,ca-target-pwrlevel = <1>;
|
||
|
|
|
||
|
|
/* NOM */
|
||
|
|
qcom,gpu-pwrlevel@0 {
|
||
|
|
reg = <0>;
|
||
|
|
qcom,gpu-freq = <650000000>;
|
||
|
|
qcom,bus-freq = <9>;
|
||
|
|
qcom,bus-min = <8>;
|
||
|
|
qcom,bus-max = <10>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* SVS L1 */
|
||
|
|
qcom,gpu-pwrlevel@1 {
|
||
|
|
reg = <1>;
|
||
|
|
qcom,gpu-freq = <500000000>;
|
||
|
|
qcom,bus-freq = <8>;
|
||
|
|
qcom,bus-min = <7>;
|
||
|
|
qcom,bus-max = <9>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* SVS */
|
||
|
|
qcom,gpu-pwrlevel@2 {
|
||
|
|
reg = <2>;
|
||
|
|
qcom,gpu-freq = <435000000>;
|
||
|
|
qcom,bus-freq = <7>;
|
||
|
|
qcom,bus-min = <5>;
|
||
|
|
qcom,bus-max = <8>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* XO */
|
||
|
|
qcom,gpu-pwrlevel@3 {
|
||
|
|
reg = <3>;
|
||
|
|
qcom,gpu-freq = <0>;
|
||
|
|
qcom,bus-freq = <0>;
|
||
|
|
qcom,bus-min = <0>;
|
||
|
|
qcom,bus-max = <0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,gpu-pwrlevels-4 {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
qcom,speed-bin = <105>;
|
||
|
|
|
||
|
|
qcom,initial-pwrlevel = <1>;
|
||
|
|
qcom,ca-target-pwrlevel = <0>;
|
||
|
|
|
||
|
|
/* SVS L1 */
|
||
|
|
qcom,gpu-pwrlevel@0 {
|
||
|
|
reg = <0>;
|
||
|
|
qcom,gpu-freq = <500000000>;
|
||
|
|
qcom,bus-freq = <8>;
|
||
|
|
qcom,bus-min = <7>;
|
||
|
|
qcom,bus-max = <9>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* SVS */
|
||
|
|
qcom,gpu-pwrlevel@1 {
|
||
|
|
reg = <1>;
|
||
|
|
qcom,gpu-freq = <435000000>;
|
||
|
|
qcom,bus-freq = <7>;
|
||
|
|
qcom,bus-min = <5>;
|
||
|
|
qcom,bus-max = <8>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* XO */
|
||
|
|
qcom,gpu-pwrlevel@2 {
|
||
|
|
reg = <2>;
|
||
|
|
qcom,gpu-freq = <0>;
|
||
|
|
qcom,bus-freq = <0>;
|
||
|
|
qcom,bus-min = <0>;
|
||
|
|
qcom,bus-max = <0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,gpu-pwrlevels-5 {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
qcom,speed-bin = <73>;
|
||
|
|
|
||
|
|
qcom,initial-pwrlevel = <0>;
|
||
|
|
qcom,ca-target-pwrlevel = <0>;
|
||
|
|
|
||
|
|
/* SVS */
|
||
|
|
qcom,gpu-pwrlevel@0 {
|
||
|
|
reg = <0>;
|
||
|
|
qcom,gpu-freq = <350000000>;
|
||
|
|
qcom,bus-freq = <7>;
|
||
|
|
qcom,bus-min = <5>;
|
||
|
|
qcom,bus-max = <8>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* XO */
|
||
|
|
qcom,gpu-pwrlevel@1 {
|
||
|
|
reg = <1>;
|
||
|
|
qcom,gpu-freq = <0>;
|
||
|
|
qcom,bus-freq = <0>;
|
||
|
|
qcom,bus-min = <0>;
|
||
|
|
qcom,bus-max = <0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&kgsl_msm_iommu {
|
||
|
|
qcom,secure-size = <0x20000000>; /* 512MB */
|
||
|
|
};
|