130 lines
3.9 KiB
Plaintext
130 lines
3.9 KiB
Plaintext
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Qualcomm GLINK edge binding
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This binding describes a Qualcomm GLINK edge, a fifo based mechanism for
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communication between subsystem-pairs on various Qualcomm platforms. Three types
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of edges can be described by the binding; the GLINK RPM edge, a SMEM based edge,
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a GLINK SPSS edge and a SPI based edge.
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- compatible:
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Usage: required for glink-rpm
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Value type: <stringlist>
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Definition: must be "qcom,glink-rpm"
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- label:
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Usage: optional
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Value type: <string>
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Definition: should specify the subsystem name this edge corresponds to.
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: should specify the IRQ used by the remote processor to
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signal this processor about communication related events
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- qcom,rpm-msg-ram:
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Usage: required for glink-rpm
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Value type: <prop-encoded-array>
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Definition: handle to RPM message memory resource
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- mboxes:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: reference to the "rpm_hlos" mailbox in APCS, as described
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in mailbox/mailbox.txt
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- cpu-affinity:
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: cores to pin the irq to
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= GLINK SPSS
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The remote proc on a GLINK SPSS edge expects the descriptors and fifos to be
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allocated by this processor. The following bindings are required to inform the
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remote proc of the allocated smem.
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- reg-names:
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Usage: required for glink-spss
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Value type: <stringlist>
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Definition: must contain the following registers
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"qcom,spss-addr" - to handoff SPSS smem address to rproc
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"qcom,spss-size" - to handoff SPSS smem size to rproc
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- reg:
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Usage: required for glink-spss
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Value type: <prop-encoded-array>
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Definition: address and size pairs describing the GLINK SPSS registers,
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the order must match the entries in reg-names
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= GLINK SPI
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The following bindings are required for a GLINK SPI edge. They describe the
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physical address where the FIFO descriptors are located. The wcd-spi driver
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uses these physical address when writing to the spi bus.
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- tx-descriptors:
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Usage: required for glink-spi
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Value type: <u32 array>
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Definition: must contain the physical addresses of the outgoing FIFO
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head and tail descriptors. The array should be <head tail>
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- rx-descriptors:
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Usage: required for glink-spi
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Value type: <u32 array>
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Definition: must contain the physical addresses of the incoming FIFO
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head and tail descriptors. The array should be <head tail>
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= GLINK DEVICES
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Each subnode of the GLINK node represent function tied to a virtual
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communication channel. The name of the nodes are not important. The properties
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of these nodes are defined by the individual bindings for the specific function
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- but must contain the following property:
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- qcom,glink-channels:
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Usage: required
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Value type: <stringlist>
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Definition: a list of channels tied to this function, used for matching
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the function to a set of virtual channels
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- qcom,intents:
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: a list of size,amount pairs describing what intents should
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be preallocated for this virtual channel. This can be used
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to tweak the default intents available for the channel to
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meet expectations of the remote.
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= EXAMPLE
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The following example represents the GLINK RPM node on a MSM8996 device, with
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the function for the "rpm_request" channel defined, which is used for
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regualtors and root clocks.
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apcs_glb: mailbox@9820000 {
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compatible = "qcom,msm8996-apcs-hmss-global";
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reg = <0x9820000 0x1000>;
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#mbox-cells = <1>;
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};
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rpm_msg_ram: memory@68000 {
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compatible = "qcom,rpm-msg-ram";
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reg = <0x68000 0x6000>;
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};
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rpm-glink {
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compatible = "qcom,glink-rpm";
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interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
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qcom,rpm-msg-ram = <&rpm_msg_ram>;
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mboxes = <&apcs_glb 0>;
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rpm-requests {
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compatible = "qcom,rpm-msm8996";
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qcom,glink-channels = "rpm_requests";
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qcom,intents = <0x400 5
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0x800 1>;
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...
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};
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};
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