99 lines
4.7 KiB
Plaintext
99 lines
4.7 KiB
Plaintext
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Qualcomm Technologies,Inc SLIMBUS controller
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Qualcomm Technologies,Inc implements 2 type of slimbus controllers:
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1. "qcom,slim-msm": This controller is used if applications processor
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driver is controlling slimbus master component. This driver is
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responsible for communicating with slave HW directly using
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messaging interface, and doing data channel management. Driver
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also communicates with satellite component (driver implemented
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by other execution environment, such as ADSP) to get its
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requirements for data channel and bandwidth requirements.
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2. "qcom,slim-ngd": This controller is used if applications processor
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driver is controlling slimbus satellite component (also known as
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Non-ported Generic Device, or NGD). This is light-weight slimbus
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controller responsible for communicating with slave HW directly
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over bus messaging interface, and communicating with master component
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(driver residing on other execution environment, such as ADSP)
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for bandwidth and data channel management.
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Required properties:
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- reg : Offset and length of the register region(s) for the device
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- reg-names : Register region name(s) referenced in reg above
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Required register resource entries are:
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"slimbus_physical": Physical adderss of controller register blocks
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"slimbus_bam_physical": Physical address of Bus Access Module (BAM)
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for this controller
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- compatible : should be "qcom,slim-msm" if this is master component driver
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- compatible : should be "qcom,slim-ngd" if this is satellite component driver
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- cell-index : SLIMBUS number used for this controller
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- interrupts : Interrupt numbers used by this controller
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- interrupt-names : Required interrupt resource entries are:
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"slimbus_irq" : Interrupt for SLIMBUS core
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"slimbus_bam_irq" : Interrupt for controller core's BAM
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Optional property:
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- reg entry for slew rate : If slew rate control register is provided, this
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entry should be used.
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- reg-name for slew rate: "slimbus_slew_reg"
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- qcom,min-clk-gear : Minimum clock gear at which this controller can be run
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(range: 1-10)
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Default value will be 1 if this entry is not specified
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- qcom,max-clk-gear: Maximum clock gear at which this controller can be run
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(range: 1-10)
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Default value will be 10 if this entry is not specified
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- qcom,rxreg-access: This boolean indicates that slimbus RX should use direct
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register access to receive data. This flag is only needed if
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BAM pipe is not available to receive data from slimbus
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- qcom,apps-ch-pipes: This value represents BAM pipe-mask used by application
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processor for data channels. If this property is not defined,
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default mask of 0 is used indicating that application
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processor does not use BAM pipes for data channels.
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- qcom,ea-pc: This value represents product code (PC) field of enumeration
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address (EA) for the QTI slimbus controller hardware.
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This value is needed if data-channels originating from apps
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are to be used, so that application processor can query
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logical address of the ported generic device to be used.
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Other than PC, fields of EA are same across platforms.
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- qcom,slim-mdm: This value provides the identifier of slimbus component on
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external mdm. This property enables the slimbus driver to
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register and receive subsytem restart notification from mdm
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and follow appropriate steps to ensure communication on the bus
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can be resumed after mdm-restart.
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- qcom,subsys-name: This value provides the subsystem name where slimbus master
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is present. This property enables the slimbus driver to
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register and receive subsytem restart notification from subsystem
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and follow appropriate steps to ensure communication on the bus
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can be resumed after subsytem restart. By default slimbus driver
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register with ADSP subsystem.
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- qcom,iommu-s1-bypass: Boolean flag to bypass IOMMU stage 1 translation.
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- qcom,iommu-atomic-ctx: Boolean flag to enable IOMMU in atomic context
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Optional subnodes:
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qcom,iommu_slim_ctrl_cb : Child node representing the Slimbus controller
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context bank.
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Subnode Required properties:
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- compatible : Must be "qcom,slim-ctrl-cb";
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- iommus : A list of phandle and IOMMU specifier pairs that
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describe the IOMMU master interfaces of the device.
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Example:
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slim@fe12f000 {
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cell-index = <1>;
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compatible = "qcom,slim-msm";
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reg = <0xfe12f000 0x35000>,
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<0xfe104000 0x20000>;
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reg-names = "slimbus_physical", "slimbus_bam_physical";
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interrupts = <0 163 0 0 164 0>;
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interrupt-names = "slimbus_irq", "slimbus_bam_irq";
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qcom,min-clk-gear = <10>;
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qcom,rxreg-access;
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qcom,apps-ch-pipes = <0x60000000>;
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qcom,ea-pc = <0x30>;
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iommu_slim_ctrl_cb: qcom,iommu_slim_ctrl_cb {
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compatible = "qcom,iommu-slim-ctrl-cb";
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iommus = <&apps_smmu 0x1 0x0>;
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};
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};
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