196 lines
8.0 KiB
Plaintext
196 lines
8.0 KiB
Plaintext
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QTI MDSS DP
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MDSS DP is a display-port driver which supports panels that are compatible with
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VESA DP and EDP display interface specification.
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When configuring the optional properties for external backlight, one should also
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configure the gpio that drives the pwm to it.
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Required properties
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- compatible : Must be "qcom,mdss-edp".
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- reg : Offset and length of the register set for the
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device.
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- reg-names : Names to refer to register sets related to this
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device
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- gdsc-supply : Phandle for gdsc regulator device node.
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- vdda-1p2-supply : Phandle for 1.2V vdda regulator device node.
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- vdda-0p9-supply : Phandle for 0.9V vdda regulator device node.
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- status : A string that has to be set to "okay/ok" to enable
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the driver. By default this property will be set to
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"disable". Will be set to "ok/okay" status for
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specific platforms.
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- qcom,mdss-fb-map: pHandle that specifies the framebuffer to which the
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interface is mapped.
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- clocks: List of Phandles for clock device nodes
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needed by the device.
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- clock-names: List of clock names needed by the device.
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- qcom,aux-en-gpio: Specifies the aux-channel enable gpio.
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- qcom,aux-sel-gpio: Specifies the aux-channel select gpio.
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- qcom,usbplug-cc-gpio: Specifies the usbplug orientation gpio.
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- qcom,aux-cfg0-settings: Specifies the DP AUX configuration 0 settings. The first
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entry in this array corresponds to the register offset
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within DP AUX, while the remaining entries indicate the
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programmable values.
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- qcom,aux-cfg1-settings: Specifies the DP AUX configuration 1 settings. The first
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entry in this array corresponds to the register offset
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within DP AUX, while the remaining entries indicate the
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programmable values.
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- qcom,aux-cfg2-settings: Specifies the DP AUX configuration 2 settings. The first
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entry in this array corresponds to the register offset
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within DP AUX, while the remaining entries indicate the
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programmable values.
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- qcom,aux-cfg3-settings: Specifies the DP AUX configuration 3 settings. The first
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entry in this array corresponds to the register offset
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within DP AUX, while the remaining entries indicate the
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programmable values.
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- qcom,aux-cfg4-settings: Specifies the DP AUX configuration 4 settings. The first
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entry in this array corresponds to the register offset
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within DP AUX, while the remaining entries indicate the
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programmable values.
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- qcom,aux-cfg5-settings: Specifies the DP AUX configuration 5 settings. The first
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entry in this array corresponds to the register offset
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within DP AUX, while the remaining entries indicate the
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programmable values.
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- qcom,aux-cfg6-settings: Specifies the DP AUX configuration 6 settings. The first
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entry in this array corresponds to the register offset
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within DP AUX, while the remaining entries indicate the
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programmable values.
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- qcom,aux-cfg7-settings: Specifies the DP AUX configuration 7 settings. The first
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entry in this array corresponds to the register offset
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within DP AUX, while the remaining entries indicate the
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programmable values.
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- qcom,aux-cfg8-settings: Specifies the DP AUX configuration 8 settings. The first
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entry in this array corresponds to the register offset
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within DP AUX, while the remaining entries indicate the
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programmable values.
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- qcom,aux-cfg9-settings: Specifies the DP AUX configuration 9 settings. The first
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entry in this array corresponds to the register offset
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within DP AUX, while the remaining entries indicate the
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programmable values.
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Optional properties:
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- qcom,<type>-supply-entries: A node that lists the elements of the supply used by the
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a particular "type" of DSI modulee. The module "types"
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can be "core", "ctrl", and "phy". Within the same type,
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there can be more than one instance of this binding,
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in which case the entry would be appended with the
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supply entry index.
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e.g. qcom,ctrl-supply-entry@0
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-- qcom,supply-name: name of the supply (vdd/vdda/vddio)
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-- qcom,supply-min-voltage: minimum voltage level (uV)
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-- qcom,supply-max-voltage: maximum voltage level (uV)
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-- qcom,supply-enable-load: load drawn (uA) from enabled supply
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-- qcom,supply-disable-load: load drawn (uA) from disabled supply
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-- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on
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-- qcom,supply-post-on-sleep: time to sleep (ms) after turning on
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-- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off
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-- qcom,supply-post-off-sleep: time to sleep (ms) after turning off
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- qcom,hpd-gpio: Specifies the HPD gpio.
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- pinctrl-names: List of names to assign mdss pin states defined in pinctrl device node
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Refer to pinctrl-bindings.txt
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- pinctrl-<0..n>: Lists phandles each pointing to the pin configuration node within a pin
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controller. These pin configurations are installed in the pinctrl
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device node. Refer to pinctrl-bindings.txt
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- qcom,logical2physical-lane-map: An array that specifies the DP logical to physical lane map setting.
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- qcom,phy-register-offset: An integer specifying the offset value of DP PHY register space.
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- qcom,max-pclk-frequency-khz: An integer specifying the max. pixel clock in KHz supported by Display Port.
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Example:
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mdss_dp_ctrl: qcom,dp_ctrl@c990000 {
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cell-index = <0>;
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compatible = "qcom,mdss-dp";
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qcom,mdss-fb-map = <&mdss_fb3>;
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gdsc-supply = <&gdsc_mdss>;
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vdda-1p2-supply = <&pm8998_l2>;
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vdda-0p9-supply = <&pm8998_l1>;
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reg = <0xc990000 0xa84>,
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<0xc011000 0x910>,
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<0x1fcb200 0x050>;
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reg-names = "dp_ctrl", "dp_phy", "tcsr_regs";
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clocks = <&clock_mmss clk_mmss_mnoc_ahb_clk>,
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<&clock_mmss clk_mmss_mdss_ahb_clk>,
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<&clock_mmss clk_mmss_mdss_axi_clk>,
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<&clock_mmss clk_mmss_mdss_mdp_clk>,
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<&clock_mmss clk_mmss_mdss_hdmi_dp_ahb_clk>,
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<&clock_mmss clk_mmss_mdss_dp_aux_clk>,
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<&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>,
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<&clock_mmss clk_mmss_mdss_dp_link_clk>,
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<&clock_mmss clk_mmss_mdss_dp_link_intf_clk>,
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<&clock_mmss clk_mmss_mdss_dp_crypto_clk>,
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<&clock_mmss clk_mmss_mdss_dp_pixel_clk>;
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clock-names = "core_mnoc_clk", "core_iface_clk", "core_bus_clk",
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"core_mdp_core_clk", "core_alt_iface_clk",
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"core_aux_clk", "core_cfg_ahb_clk", "ctrl_link_clk",
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"ctrl_link_iface_clk", "ctrl_crypto_clk", "ctrl_pixel_clk";
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qcom,aux-cfg0-settings = [1c 00];
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qcom,aux-cfg1-settings = [20 13 23 1d];
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qcom,aux-cfg2-settings = [24 00];
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qcom,aux-cfg3-settings = [28 00];
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qcom,aux-cfg4-settings = [2c 0a];
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qcom,aux-cfg5-settings = [30 26];
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qcom,aux-cfg6-settings = [34 0a];
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qcom,aux-cfg7-settings = [38 03];
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qcom,aux-cfg8-settings = [3c bb];
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qcom,aux-cfg9-settings = [40 03];
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qcom,logical2physical-lane-map = [02 03 01 00];
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qcom,phy-register-offset = <0x4>;
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qcom,max-pclk-frequency-khz = <593470>;
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qcom,core-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,core-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "gdsc";
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qcom,supply-min-voltage = <0>;
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qcom,supply-max-voltage = <0>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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};
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qcom,ctrl-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,ctrl-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vdda-1p2";
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qcom,supply-min-voltage = <1200000>;
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qcom,supply-max-voltage = <1200000>;
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qcom,supply-enable-load = <12560>;
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qcom,supply-disable-load = <4>;
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};
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};
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qcom,phy-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,phy-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vdda-0p9";
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qcom,supply-min-voltage = <880000>;
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qcom,supply-max-voltage = <880000>;
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qcom,supply-enable-load = <73400>;
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qcom,supply-disable-load = <32>;
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};
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};
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pinctrl-names = "mdss_dp_active", "mdss_dp_sleep";
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pinctrl-0 = <&mdss_dp_aux_active &mdss_dp_usbplug_cc_active
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&mdss_dp_hpd_active>;
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pinctrl-1 = <&mdss_dp_aux_suspend &mdss_dp_usbplug_cc_suspend
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&mdss_dp_hpd_suspend>;
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qcom,aux-en-gpio = <&tlmm 77 0>;
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qcom,aux-sel-gpio = <&tlmm 78 0>;
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qcom,usbplug-cc-gpio = <&tlmm 38 0>;
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qcom,hpd-gpio = <&tlmm 34 0>;
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};
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