39 lines
1.2 KiB
Plaintext
39 lines
1.2 KiB
Plaintext
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Qualcomm Technologies, Inc. Graphics Clock & Reset Controller Binding
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--------------------------------------------------------------------
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Required properties :
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- compatible : shall contain one of the following:
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"qcom,gpucc-sm8150",
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"qcom,gpucc-sa8155",
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"qcom,gpucc-sdmshrike",
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"qcom,gpucc-sm6150",
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"qcom,gpucc-sdmmagpie",
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"qcom,gpucc-trinket",
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"qcom,gpucc-sa6155",
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"qcom,atoll-gpucc",
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"qcom,gpucc-sdm660",
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"qcom,gpucc-sdm630",
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"qcom,gpu-sdm660".
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- reg : shall contain base register offset and size.
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- reg-names: names of registers listed in the same order as in the reg property.
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Must contain "cc_base".
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- #clock-cells : from common clock binding, shall contain 1.
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- #reset-cells : from common reset binding, shall contain 1.
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- vdd_cx-supply : The vdd_cx logic rail supply.
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- vdd_mx-supply : The vdd_mx logic rail supply.
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Optional properties :
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- #power-domain-cells : from generic power domain binding, shall contain 1.
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Example:
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clock_gpucc: clock-controller@0x2c90000 {
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compatible = "qcom,gpucc-sm8150";
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reg = <0x2c90000 0x9000>;
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reg-names = "cc_base";
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vdd_cx-supply = <&pm8150l_s6_level>;
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vdd_mx-supply = <&pm8150l_s4_level>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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